FW Verification Engineer
The RISC-V CPU team owns the companies CPU IPs. The CPU deploys FW for several features such as Power Management, Survivability and Debug. This role focuses on FW verification at various levels - from unit to System on Package, & across different platforms - simulation, emulation, & silicon.
Scope:
* Define FW verification strategy, considering design maturity, cost-benefit analysis of different verification platforms, & dev costs.
* Create a comprehensive test plan which includes cross-feature validation.
* Develop a FW debug strategy for verification & post-silicon environments.
* Provide support for customer queries with documentation, FW APIs, & sample programs.
* Manage test plan execution, including failure resolution, in collaboration with cross-disciplinary teams - HW Design, System Engineering, & Post-Silicon.
* Conduct technical design & code reviews to provide design support and mentor jr. engineers.
Required:
* Degree in EE with 7+ years of experience.
* Experience in FW verification.
* Experience in at least one functional domain - Power management, RAS, or post-silicon debug.
* Familiar with programming languages - C, C++, & Python.
* Understanding of verification methods/concepts, including directed random testing, coverage analysis, & monitors.
Pluses:
* Knowledge of any RTOS.
FW Verification Engineer
The RISC-V CPU team owns the companies CPU IPs. The CPU deploys FW for several features such as Power Management, Survivability and Debug. This role focuses on FW verification at various levels - from unit to System on Package, & across different platforms - simulation, emulation, & silicon.
Scope:
* Define FW verification strategy, considering design maturity, cost-benefit analysis of different verification platforms, & dev costs.
* Create a comprehensive test plan which includes cross-feature validation.
* Develop a FW debug strategy for verification & post-silicon environments.
* Provide support for customer queries with documentation, FW APIs, & sample programs.
* Manage test plan execution, including failure resolution, in collaboration with cross-disciplinary teams - HW Design, System Engineering, & Post-Silicon.
* Conduct technical design & code reviews to provide design support and mentor jr. engineers.
Required:
* Degree in EE with 7+ years of experience.
* Experience in FW verification.
* Experience in at least one functional domain - Power management, RAS, or post-silicon debug.
* Familiar with programming languages - C, C++, & Python.
* Understanding of verification methods/concepts, including directed random testing, coverage analysis, & monitors.
Pluses:
* Knowledge of any RTOS.
Estimated Min Rate: $70.00
Estimated Max Rate: $80.00
Note: Any pay ranges displayed are estimations. Actual pay is determined by an applicant's experience, technical expertise, and other qualifications as listed in the job description. All qualified applicants are welcome to apply.
Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
Visit https://www.yoh.com/applicants-with-disabilities
to contact us if you are an individual with a disability and require accommodation in the application process.
For California applicants, qualified applicants with arrest or conviction records will be considered for employment in accordance with the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act. All of the material job duties described in this posting are job duties for which a criminal history may have a direct, adverse, and negative relationship potentially resulting in the withdrawal of a conditional offer of employment.
YOH Services LLC
Jan 24, 2025