R&D Engineering, Architect- FPGA Design-PCIe Protocol
Synopsys | |
$208000-$312000
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United States, California, Sunnyvale | |
Apr 27, 2026 | |
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Date posted 03/10/2026
Category Engineering Hire Type Employee Job ID 16063 Base Salary Range $208000-$312000 Remote Eligible No Date Posted 03/10/2026 We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are:You are a visionary engineering leader with deep expertise in FPGA design and advanced protocol integration, ready to architect and deliver solutions that bridge real-world interfaces with cutting-edge emulation and prototyping platforms. You thrive in environments where complex system-level challenges are solved collaboratively, and your technical acumen is matched by your passion for innovation. You have extensive hands-on experience with PCIe and/or CXL protocols, and you understand the importance of robust, high-fidelity validation in semiconductor product development. You are comfortable navigating the intricacies of RTL development, firmware integration, and hardware/software interaction, and you bring a holistic perspective to system architecture. Your communication skills enable you to lead technical discussions across global, cross-functional teams, and you are adept at supporting customers through intricate system bring-up and debug. You are excited by the opportunity to influence the roadmap for next-generation protocols and contribute to patent-pending technologies that set industry standards. Your drive for continuous learning keeps you at the forefront of emerging trends in hardware-assisted verification, and you are committed to mentoring and inspiring others within the team. You value diversity of thought and experience, and you approach every challenge with curiosity, resilience, and a collaborative spirit. What You'll Be Doing:
You'll join the Speed Adapter engineering team within Synopsys' HW-Assisted Verification (HAV) organization. This talented group is dedicated to developing and deploying industry-leading Speed Adapter solutions that bridge advanced protocols and real-world interfaces with ZeBu emulation and HAPS prototyping platforms. The team collaborates globally across IP, emulation, and prototyping domains to deliver robust, high-performance system validation solutions, directly impacting the success of top semiconductor and hyperscale customers. Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S. | |
$208000-$312000
Apr 27, 2026